(1) complete title of one (or more) paper(s) published in the open literature Artificial evolution in computer aided design: from the optimization of parameters to the creation of assembly programs Automatic generation of software-based functional failing test for speed debug and on-silicon timing verification (2) the name, complete physical mailing address, e-mail address, and phone number of EACH author of EACH paper Ernesto Sanchez Politecnico di Torino - Dip. Automatica e Informatica C.so Duca degli Abruzzi 24 - 10129 Torino - ITALY Tel: +39-011564.7182 Email: ernesto.sanchez@polito.it Giovanni Squillero Politecnico di Torino - Dip. Automatica e Informatica C.so Duca degli Abruzzi 24 - 10129 Torino - ITALY Tel: +39-011564.7186 Email: giovanni.squillero@polito.it Alberto Tonda Institut des Systèmes Complexes Paris Île-de-France - 75005 Tel: +39-3398932277 Email: alberto.tonda@iscpif.fr (3) the name of the corresponding author Giovanni Squillero (4) the abstract of the paper(s) Evolutionary computation has been little, but steadily, used in the CAD community during the past 20 years. Nowadays, due to their overwhelming complexity, significant steps in the validation of microprocessors must be performed on silicon, i.e., running experiments on physical devices after tape-out. The scenario created new space for innovative heuristics. This paper shows a methodology based on an evolutionary algorithm that can be used to devise assembly programs suitable for a range of on-silicon activities. The paper describes how to take into account complex hardware characteristics and architectural details. The experimental evaluation performed on two high-end Intel microprocessors demonstrates the potentiality of this line of research. The 40 years since the appearance of the Intel 4004 deeply changed how microprocessors are designed. Today, essential steps in the validation process are performed relying on physical dices, analyzing the actual behavior under appropriate stimuli. This paper presents a methodology that can be used to devise assembly programs suitable for a range of on-silicon activities, like speed debug, timing verification or speed binning. The methodology is fully automatic. It exploits the feedback from the microprocessor under examination and does not rely on information about its microarchitecture, nor does it require design-for-debug features. The experimental evaluation performed on a Intel Pentium Core i7-950 demonstrates the feasibility of the approach. (5) a list containing one or more of the eight letters (A, B, C, D, E, F, G, or H) that correspond to the criteria (see above) that the author claims that the work satisfies, D: The result is publishable in its own right as a new scientific result independent of the fact that the result was mechanically created. E: The result is equal to or better than the most recent human-created solution to a long-standing problem for which there has been a succession of increasingly better human-created solutions. G: The result solves a problem of indisputable difficulty in its field. (6) a statement stating why the result satisfies the criteria that the contestant claims (see examples of statements of human-competitiveness as a guide to aid in constructing this part of the submission), The papers describes a methodology for creating assembly programs that stress specific features of the microarchitecture of a microprocessor. As a result, the generated assembly program WON'T WORK CORRECTLY if the operating frequency is increased. Such "failing tests" are essential during speed-related post-silicon verification activities, critical steps in the manufacturing of new devices. The EA was demonstrated able to achieve the goal without information about the underlying microarchitecture of the device. On the contrary, human experts fail even knowing design details. The word "solve" may be presumptuous, but the problem was tackled effectively. Results are better than any human-created one, and better than solutions achieved by other methodologies so far. The first paper summarizes a 2-year research. As sometimes happen, the storyline can be traced looking at the publications. The first ideas were shown in a poster at GECCO, then the application was presented to the CAD community in a workshop (no formal proceedings) at the European Test Workshop in the beginning of 2011. The first results using actual overclocking rather than undervolting were presented at the International Conference on Very Large Scale Integration. The definitive results were published at the end of the year in the International Workshop on Microprocessor Test and Verification (see paper): "Automatic Generation of Software-based Functional Failing Test for Speed Debug and On-silicon Timing Verification". (7) a full citation of the paper (that is, author names; publication date; name of journal, conference, technical report, thesis, book, or book chapter; name of editors, if applicable, of the journal or edited book; publisher name; publisher city; page numbers, if applicable); G. Squillero, "Artificial evolution in computer aided design: from the optimization of parameters to the creation of assembly programs", Computing, Volume 93, Numbers 2-4 (2011), pp. 103-120, Springer, DOI: 10.1007/s00607-011-0157-9 E. Sanchez, G. Squillero, A. Tonda, "Automatic Generation of Software-based Functional Failing Test for Speed Debug and On-silicon Timing Verification", 12th International Workshop on Microprocessor Test and Verification, 2011, pp. 51-55, IEEE, DOI: 10.1109/MTV.2011.19 (8) a statement either that “any prize money, if any, is to be divided equally among the co-authors” OR a specific percentage breakdown as to how the prize money, if any, is to be divided among the co-authors; and Any prize money, if any, is to be given entirely to Giovanni Squillero. It will be later shared among co-authors (Ernesto Sanchez, Alberto Tonda and the rest of the CAD Group). (9) a statement stating why the judges should consider the entry as “best” in comparison to other entries that may also be “human-competitive.” The research tackles a critical problem in the design of microprocessors. The problem is still open, but the results show that an EA is able to outperform any known human-devised methodology. The work has been positively evaluated by experts in the CAD community. For this particular community, the methodology exploited is largely irrelevant: what matters is the efficiency of the final results.